As is known in the art, an important requirement for a Radio Frequency (RF) Transistor Amplifier design is the linear operation of the amplifier. Common design or system techniques to enhance linearity performance are feedback, feedforward or pre-distortion. A common pre-distortion technique involves adding a linearizing diode circuit to the input of a FET amplifier, as shown in FIG. 1. Here the diode anode is connected near the gate of amplifier FET and the cathode is connected near the drain.
More particularly, during RF stimulus the FET gate to source capacitance (Cgs) will vary non-linearly, typically following a hyperbolic tangent curve, with gate voltage. A plot of this non-linear gate to source voltage (Vgs) vs. the capacitance in femtofarads (fF) between the gate and source (Cgs) relationship for a GaN HEMT is shown in FIG. 2. This non-linear varying capacitance degrades amplifier linear operation. An additional parallel capacitance (C diode) which varies inverse to the variation of Cgs with Vgs can be introduced at the input of the FET or amplifier to compensate for the above-described undesirable gate to source capacitance variation. This additional capacitance (C diode) is supplied by adding a linearizing diode at the input to the FET; the diode (C diode) providing an anode to cathode capacitance having the inverse non-linear relationship when the anode of the diode shares the gate node of the FET and the cathode of the diode share the drain node of the FET. Since the FET gate and diode anode nodes are shared, their respective non-linear capacitances add together resulting in a linear capacitance verses gate to source voltage at the gate node. This linearized input capacitance can result in a more linear amplifier operation, see Mural, ASK; Shirasgaonkar, M.; Patrikar, “Power Amplifier Linearization using a Diode”, IEEE MELECON 2006, May 16-19, Benalmádena (Málaga), Spain and Kairos Ando, Yoichiro Takayama, Tsuyoshi Yoshida, Ryo Ishikawa, and Kazuhiko Honjo, A High-Efficiency Class-F GaN HEMT Power “Amplifier with a Diode Predistortion Linearizer”, Microwave Conference, 2008, APMC 2008. Asia-Pacific.
It is also known in the art, a plurality of FETs may be arranged as a Monolithic Microwave Integrated Circuit (MMIC) chip power amplifier, as shown in FIG. 3A. Here, the RE input signal is fed to an input matching network (IMN), the output of which is fed equally to the input of each one of the plurality of plural cell FETs. The outputs of each one of the plurality of plural cell FETs are combined and fed to an output matching network (OMN), as shown. The linearizing diode, described above, is connected to the input of the amplifier either “off” the MMIC chip, as shown in FIG. 3A, or “on” the MMIC chip (FIG. 3B) as described in a paper entitled “High linearity GaN HEMT power amplifier with pre-linearization gate diode”, Shouxuan Xie, Vamsi Paidi, Sten Heikman, Alessandro Chini, Umesh K. Mishra, Mark J. W. Rodwell and Stephen I. Long, published in High Performance Devices, 2004. Proceedings IEEE Lester Eastman Conference, 4-6 Aug. 2004, pages 223-228.
As is also known in the art, one type of FET includes a plurality of linearly arranged FET cells (herein sometimes referred to as a plural cell FET) as shown in FIGS. 4A and 4B on a semiconductor, here a GaN, mesa hetero-structure, as shown, which provides an active region for the FET. Here, ends of gate finger-like electrodes are connected to a common gate manifold contact pad. Each gate finger-like electrodes (G) controls a flow of carriers in a channel region between a source region (S) and a drain region (D). Drain and source electrodes are in ohmic contact with the FET drain and source regions; and the gate finger-like electrodes (G) are in Schottky contact with the gate regions The drain electrodes have ends thereof connected to a drain manifold contact and the source regions are interconnected by air bridges as shown. The end ones of the source region (S) are connected to a ground plane conductor on the bottom surface of a substrate with electrically conductive vias, as shown. However, alternatively, each one of the source regions (S) may be connected to the ground plane on the bottom surface of the substrate as shown in FIG. 4C or alternatively, the vias and ground plane may be removed as with a coplanar wave guide (CPW) transmission structure where the ground plane, not shown, is on the upper surface of the substrate, (FIG. 4D).